1. Field of the Invention
The present invention relates to semiconductor structures and, more particularly, to a semiconductor structure with galvanically-isolated signal and power paths.
2. Description of the Related Art
Galvanic isolation refers to an isolation that prevents a first system from communicating with a second system by way of a flow of electrons from one system to the other system, but which allows the two systems to communicate in other ways. For example, the first system can transmit a signal to the second system using changes in inductance or capacitance, or by using optical or other means.
The first system and the second system commonly have separate power supplies, but a single power supply can also be used where the first system transfers galvanically-isolated power to the second system. A single power supply has the advantage of eliminating the power supply requirements of the second system. However, galvanic isolation with a single power supply tends to be bulky and expensive.
Galvanic isolation is typically implemented with a dielectric layer that lies between and electrically isolates a first conductor, such as the first coil of a transformer or the first plate of a capacitor, and a second conductor, such as the second coil of the transformer or the second plate of the capacitor. Galvanic isolation is commonly used in multi-die chips that operate with different ground potentials and require a large isolation voltage, such as 5000VRMS.
FIGS. 1A-1D show views that illustrate an example of a prior-art multi-die chip 100. FIG. 1A shows a plan view of multi-die chip 100, FIG. 1B shows a cross-sectional view of multi-die chip 100 taken along lines 1B-1B of FIG. 1A, FIG. 1C shows a plan view of multi-die chip 100 taken along lines 1C-1C of FIG. 1B, and FIG. 1D shows a cross-sectional view of multi-die chip 100 taken along lines 1D-1D of FIG. 1A.
As shown in FIGS. 1A-1D, multi-die chip 100 includes a non-conductive structure 110, a number of high-voltage planar coils 112 that are isolated by non-conductive structure 110, and a corresponding number of low-voltage planar coils 114 that are isolated by non-conductive structure 110. (Only one high-voltage planar coil 112 and one low-voltage planar coil 114 are shown for clarity.)
The high-voltage planar coils 112 and the low-voltage planar coils 114 are arranged in pairs and vertically aligned so that each high-voltage planar coil 112 is inductively coupled to a corresponding low-voltage planar coil 114. Each high-voltage planar coil 112 and vertically-aligned low-voltage planar coil 114 functions as an “air-core” transformer 116 that provides an inductively-coupled signal path. (Air core transformer 116 can also be used to transfer power. However, the very low efficiency makes this a poor approach to transferring power.)
As further shown in FIGS. 1A-1D, multi-die chip 100 also includes a high-voltage die 120 and a low-voltage die 122 that are adhesively attached to non-conductive structure 110. High-voltage die 120 is electrically connected to each of the high-voltage planar coils 112, and low-voltage die 122 is electrically connected to each of the low-voltage planar coils 114 to provide a number of galvanically-isolated signal paths.
Non-conductive structure 110, in turn, is adhesively attached to a die attach pad or paddle (DAP), which is part of a lead frame. (Alternately, low-voltage die 122 and multi-die chip 100 without low-voltage die 122 can be adhesively attached to a split DAP to isolate the substrates.)
Multi-die chip 100 additionally includes a toroidal transformer 124 that is adhesively attached to the top surface of non-conductive structure 110. Toroidal transformer 124 has a high-voltage input and a high-voltage output that are electrically connected to high-voltage die 120, and a low-voltage input and a low-voltage output that are electrically connected to low-voltage die 122.
As additionally shown in FIGS. 1A-1D, high-voltage die 120 is electrically connected to the high-voltage planar coils 112 and toroidal transformer 124, and low-voltage die 122 is electrically connected to the low-voltage planar coils 114 and toroidal transformer 124 by way of a number of bonding wires 126.
In operation, high-voltage die 120 transmits data to low-voltage die 122 by encoding the data, and then placing encoded data signals in the form of pulses, RF waveforms, or glitches onto a high-voltage planar coil 112. The signals are inductively coupled to a low-voltage planar coil 114, and are then detected and decoded by low-voltage die 122. (Signals can also be sent from low-voltage die 122 to high-voltage die 120 in the same manner using a different pair of vertically-aligned planar coils.) In addition, toroidal transformer 124 transfers power from high-voltage die 120 to low-voltage die 122 based on the ratio of turns.
Although multi-die chip 100 provides galvanic isolation for both the signal and power paths, toroidal transformer 124 tends to be bulky and expensive to manufacture. Thus, there is a need for a smaller and less expensive multi-die chip that provides galvanic isolation for both the signal and power paths.